In digital data transmission links, input signal parameter variations may occur which contribute to degradation of link performance. For various reasons the received data signal and its associated clock signal may include separately variable parameters as could occur when they are transmitted over separate signal paths. Typical signal parameter variations thus would include data signal asymmetry and clock signal asymmetry, phase offset and jitter, noise, signal amplitude variations and the like. It was desirable to correct for these variations prior to encoding to insure accuracy in the encoded data. Previous approaches used a four-phase clock adjustment scheme in conjunction with a phase locked loop for phase positioning the data signal with the clock signal, but resolution was inadequate. Also, there was no capability of recognition possible frequency mislock conditions in the phase locked loop. Further, no provision was made for compensating for cable loss and signal rise/fall time effects on data asymmetry.
Various convolutional encoding techniques for error detection and correction in digital data have been proposed in the prior art. Those known are U.S. Pat. Nos. 4,055,832; 4,143,354; 4,193,062; and 4,293,951.